Invited Speaker

Dr. Jiangwei Liu

Dr. Jiangwei Liu

Principal Researcher, Research Center for Electronic and Optical Materials
National Institute for Materials Science, Japan
Speech Title: Diamond Logic Circuits Consisting of Depletion-Mode and Enhancement-Mode MOSFETs

Abstract: During recent several years, hydrogenated-diamond (H-diamond) based metal-oxide-semiconductor field-effect transistors (MOSFETs) have been developed greatly. The MOSFETs with structures of SD-Ta2O5/ALD-Al2O3/H-diamond and SD-ZrO2/ALD-Al2O3/H-diamond (where SD and ALD refer to atomic layer deposition and sputtering deposition techniques for oxide insulators deposition) showed depletion-mode (D-mode) characteristics. In contrast, SD-LaAlO3/ALD-Al2O3/H-diamond and SD-HfO2/ALD-HfO2/H-diamond MOSFETs showed enhancement-mode (E-mode) characteristics. The studies revealed that the D-/E-mode characteristics of the H-diamond MOSFETs were independent of the oxide insulators and device structures, and reproducibly depended on the fabrication processes. By comparing the fabrication process difference, it was found that the oxide/H-diamond interface for the E-mode MOSFETs was annealed at 180 °C during the photoresist baking step. However, that of the D-mode MOSFETs was not annealed. Because holes accumulation in the H-diamond channel layer is thermosensitive, annealing possibly led to the disappearance of holes and the formation of E-mode characteristics. Therefore, annealing effect on the electrical properties of H-diamond-based MOSFETs and guidelines to control the D-/E-mode characteristics of H-diamond MOSFETs were investigated. After clarifying the controlling conditions for the D-/E-mode characteristics of the H-diamond MOSFETs, the logic circuits composed of D-/E-mode H-diamond MOSFETs were fabricated successfully.

In this talk, the controlling conditions for the D-/E-mode characteristics of the H-diamond MOSFETs and the fabrication of D-/E-mode H-diamond MOSFET logic circuits will be discussed.


Biography: Dr. Jiangwei Liu is currently a Principal Researcher at Next-generation Semiconductor Group of National Institute for Materials Science (NIMS), Japan. He received his Ph. D degree from the University of Tokyo in 2012. He worked as a postdoctoral researcher at Wide Bandgap Materials Group of NIMS from 2012 to 2013 and as an independent ICYS researcher at International Center for Young Scientists (ICYS) of NIMS from 2014 to 2016. He became a tenured Independent Scientist from 2016 and changed to the current position from 2023. He is an elected person of JSPS-LEADER (Leading Initiative for Excellent Young Researchers) Program in 2016, NIMS-ICYS Program in 2014, and MEXT-GCOE (Global Center of Excellence) Program in 2009. He is presently interested in wide bandgap semiconductor-based electronic devices and semiconductor physics. He has authored and co-authored over 80 Journal publications and three Japanese Patent with h-index of 24.